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cy62148e mobl ? 4-mbit (512 k 8) static ram cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 38-05442 rev. *m revised august 19, 2013 4-mbit (512 k 8) static ram features very high speed: 45 ns voltage range: 4.5 v to 5.5 v pin compatible with cy62148b ultra low standby power ? typical standby current: 1 a ? maximum standby current: 7 a (industrial) ultra low active power ? typical active current: 2.0 ma at f = 1 mhz easy memory expansion with ce , and oe features automatic power-down when deselected complementary metal oxide semiconductor (cmos) for optimum speed and power available in pb-free 32-pin thin small outline package (tsop) ii and 32-pin small-outline integrated circuit (soic) [1] packages functional description the cy62148e is a high performance cmos static ram organized as 512 k words by 8-bits. this device features advanced circuit design to provide ultra low standby current. this is ideal for providing more battery life? (mobl ? ) in portable applications. the device also has an automatic power-down feature that significantly re duces power consumption when addresses are not toggling. placing the device into standby mode reduces power consumption by more than 99% when deselected (ce high). the eight i nput and output pins (i/o 0 through i/o 7 ) are placed in a high impedance state when the device is deselected (ce high), outputs are disabled (oe high), or during an active write operation (ce low and we low). to write to the device, take chip enable (ce ) and write enable (we ) inputs low. data on the eight i/o pins (i/o 0 through i/o 7 ) is then written into the location specified on the address pins (a 0 through a 18 ). to read from the device, take chip enable (ce ) and output enable (oe ) low while forcing write enable (we ) high. under these conditions, the contents of the memory location specified by the address pins appear on the i/o pins. the cy62148e device is suitable for interfacing with processors that have ttl i/p levels. it is not suitable for processors that require cmos i/p levels. please see electrical characteristics on page 4 for more details and suggested alternatives. logic block diagram a 0 io 0 io 7 io 1 io 2 io 3 io 4 io 5 io 6 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 sense amps power down ce we oe a 13 a 14 a 15 a 16 a 17 row decoder column decoder 512k x 8 array input buffer a 10 a 11 a 12 a 18 io 0 io 1 io 2 io 3 io 4 io 5 io 6 io 7 note 1. soic package is available only in 55 ns speed bin.
cy62148e mobl ? document number: 38-05442 rev. *m page 2 of 18 contents pin configurations ........................................................... 3 product portfolio .............................................................. 3 maximum ratings ............................................................. 4 operating range ............................................................... 4 electrical characteristics ................................................. 4 capacitance ...................................................................... 5 thermal resistance .......................................................... 5 ac test loads and waveforms ....................................... 5 data retention characteristics ....................................... 6 data retention waveform ................................................ 6 switching characteristics ................................................ 7 switching waveforms ...................................................... 8 truth table ...................................................................... 10 ordering information ...................................................... 11 ordering code definitions ..... .................................... 11 package diagrams .......................................................... 12 acronyms ........................................................................ 14 document conventions ................................................. 14 units of measure ....................................................... 14 document history page ................................................. 15 sales, solutions, and legal information ...................... 18 worldwide sales and design s upport ......... .............. 18 products .................................................................... 18 psoc? solutions ...................................................... 18 cypress developer community ................................. 18 technical support ................. .................................... 18
cy62148e mobl ? document number: 38-05442 rev. *m page 3 of 18 pin configurations figure 1. 32-pin soic/tsop ii pinout 1 2 3 4 5 6 7 8 9 10 11 14 31 32 12 13 16 15 29 30 21 22 19 20 27 28 25 26 17 18 23 24 top view a 17 a 16 a 15 a 14 a 13 a 12 a 11 a 10 a 9 a 8 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 v ss v cc a 18 we oe ce product portfolio product range v cc range (v) speed (ns) power dissipation operating i cc (ma) standby i sb2 ( a) f = 1 mhz f = f max min typ [2] max typ [2] max typ [2] max typ [2] max cy62148ell tsop ii industrial 4.5 5.0 5.5 45 2 2.5 15 20 1 7 cy62148ell soic industrial / automotive-a 4.5 5.0 5.5 55 2 2.5 15 20 1 7 note 2. typical values are included for reference only and are not guaranteed or tested. typical values are measured at v cc = v cc(typ) , t a = 25 c.
cy62148e mobl ? document number: 38-05442 rev. *m page 4 of 18 maximum ratings exceeding maximum ratings may shorten the useful life of the device. user guidelines are not tested. storage temperature ............................... ?65 c to + 150 c ambient temperature with power applied ......................................... ?55 c to + 125 c supply voltage to ground potential ................. ?0.5 v to 6.0 v (v ccmax + 0.5 v) dc voltage applied to outputs in high z state [3, 4] ............. ?0.5 v to 6.0 v (v ccmax + 0.5 v) dc input voltage [3, 4] ......... ?0.5 v to 6.0 v (v ccmax + 0.5 v) output current into outputs (low) ............................. 20 ma static discharge voltage (per mil-std-883, method 3015) .............. ............ > 2001 v latch-up current .................................................... > 200 ma operating range device range ambient temperature v cc [5] cy62148e industrial / automotive-a ?40 c to +85 c 4.5 v to 5.5 v electrical characteristics over the operating range parameter description test conditions 45 ns 55 ns [6] unit min typ [7] max min typ [7] max v oh [8] output high voltage v cc = 4.5 v, i oh = ?1 ma 2.4 ? ? 2.4 ? ? v v cc = 5.5 v, i oh = ?0.1 ma ? ? 3.4 [8] ? ? 3.4 [8] v v ol output low voltage i ol = 2.1 ma ? ? 0.4 ? ? 0.4 v v ih input high voltage v cc = 4.5 v to 5.5 v 2.2 ? v cc + 0.5 2.2 ? v cc + 0.5 v v il input low voltage v cc = 4.5 v to 5.5 v for tsopii package ?0.5 ? 0.8 ? ? ? v for soic package ? ? ? ?0.5 ? 0.6 [9] i ix input leakage current gnd < v i < v cc ?1 ? +1 ?1 ? +1 a i oz output leakage current gnd < v o < v cc , output disabled ?1 ? +1 ?1 ? +1 a i cc v cc operating supply current f = f max = 1/t rc v cc = v cc(max) , i out = 0 ma cmos levels ?1520?1520ma f = 1 mhz ? 2 2.5 ? 2 2.5 i sb2 [10] automatic ce power-down current ? cmos inputs ce > v cc ? 0.2 v, v in > v cc ? 0.2 v or v in < 0.2 v, f = 0, v cc = v cc(max) ?1 7 ?1 7 a notes 3. v il(min) = ?2.0 v for pulse durations less than 20 ns for i < 30 ma. 4. v ih(max) = v cc + 0.75 v for pulse durations less than 20 ns. 5. full device ac operation assumes a minimum of 100 s ramp time from 0 to v cc(min) and 200 s wait time after v cc stabilization. 6. soic package is available only in 55 ns speed bin. 7. typical values are included for reference and are not guaranteed or tested. typical values are measured at v cc = v cc(typ) , t a = 25 c. 8. please note that the maximum v oh limit for this device does not exceed minimum cmos v ih of 3.5v. if you are interfacing th is sram with 5 v legacy processors that require a minimum v ih of 3.5 v, please refer to application note an6081 for technical details and options you may consider. 9. under dc conditions the device meets a v il of 0.8 v. however, in dynamic conditions input low voltage applied to the device must not be higher than 0.6 v. this is applicable to soic package only. 10. chip enable (ce ) must be high at cmos level to meet the i sb2 / i ccdr spec. other inputs can be left floating.
cy62148e mobl ? document number: 38-05442 rev. *m page 5 of 18 capacitance parameter [11] description test conditions max unit c in input capacitance t a = 25 c, f = 1 mhz, v cc = v cc(typ) 10 pf c out output capacitance 10 pf thermal resistance parameter [11] description test conditions 32-pin soic package 32-pin tsop ii package unit ? ja thermal resistance (junction to ambient) still air, soldered on a 3 4.5 inch, two-layer printed circuit board 75 77 ? c/w ? jc thermal resistance (junction to case) 10 13 ? c/w ac test loads and waveforms figure 2. ac test loads and waveforms 3.0 v v cc output r2 30 pf including jig and scope gnd 90% 10% 90% 10% rise time = 1 v/ns fall time = 1 v/ns output v equivalent to: thevenin equivalent all input pulses r th r1 parameter [11] 5.0 v unit r1 1800 ? r2 990 ? r th 639 ? v th 1.77 v note 11. tested initially and after any design or proc ess changes that may affect these parameters.
cy62148e mobl ? document number: 38-05442 rev. *m page 6 of 18 data retention characteristics over the operating range parameter description conditions min typ [12] max unit v dr v cc for data retention 2 ? ? v i ccdr [13] data retention current v cc = v dr , ce > v cc ? 0.2 v, v in > v cc ? 0.2 v or v in < 0.2 v industrial / automotive-a ?17a t cdr chip deselect to data retention time 0??ns t r [14] operation recovery time tsop ii 45 ? ? ns soic 55 ? ? ns data retention waveform figure 3. data retention waveform v cc(min) v cc(min) t cdr v dr > 2.0 v data retention mode t r v cc ce notes 12. typical values are included for reference and are not guaranteed or tested. typical values are measured at v cc = v cc(typ) , t a = 25 c. 13. chip enable (ce ) must be high at cmos level to meet the i sb2 / i ccdr spec. other inputs can be left floating. 14. full device operation requires linear v cc ramp from v dr to v cc(min) > 100 s or stable at v cc(min) > 100 s.
cy62148e mobl ? document number: 38-05442 rev. *m page 7 of 18 switching characteristics over the operating range parameter [15, 16] description 45 ns 55 ns [17] unit min max min max read cycle t rc read cycle time 45 ? 55 ? ns t aa address to data valid ? 45 ? 55 ns t oha data hold from address change 10 ? 10 ? ns t ace ce low to data valid ?45?55ns t doe oe low to data valid ?22?25ns t lzoe oe low to low z [18] 5?5?ns t hzoe oe high to high z [18, 19] ?18?20ns t lzce ce low to low z [18] 10?10?ns t hzce ce high to high z [18, 19] ?18?20ns t pu ce low to power-up 0?0?ns t pd ce high to power-down ?45?55ns write cycle [20] t wc write cycle time 45 ? 55 ? ns t sce ce low to write end 35?40?ns t aw address setup to write end 35 ? 40 ? ns t ha address hold from write end 0 ? 0 ? ns t sa address setup to write start 0 ? 0 ? ns t pwe we pulse width 35?40?ns t sd data setup to write end 25 ? 25 ? ns t hd data hold from write end 0 ? 0 ? ns t hzwe we low to high z [18, 19] ?18?20ns t lzwe we high to low z [18] 10?10?ns notes 15. in an earlier revision of this device, under a specific app lication condition, read and write operations were limited to swi tching of the chip enable signal as described in the application note an66311 . however, the issue has been fixed and in production now, and hence, this application notes is no longer applicable. it is ava ilable for download on our website as it contains information on the date code of the parts, beyond which the fix has been in producti on. 16. test conditions for all parameters other than tri-state paramete rs assume signal transition time of 3 ns or less, timing ref erence levels of 1.5 v, input pulse levels of 0 to 3 v, and output loading of the specified i ol /i oh as shown in the figure 2 on page 5 . 17. soic package is available only in 55 ns speed bin. 18. at any temperature and voltage condition, t hzce is less than t lzce , t hzoe is less than t lzoe , and t hzwe is less than t lzwe for any device. 19. t hzoe , t hzce , and t hzwe transitions are measured when the outputs enter a high impedance state. 20. the internal wre.ite time of the memory is defined by the overlap of we , ce = v il . all signals must be active to initiate a write and any of these signals can terminate a write by going inactive. the data input setup and hold timing should be referenced to the edge of the signal that terminates the write.
cy62148e mobl ? document number: 38-05442 rev. *m page 8 of 18 switching waveforms figure 4. read cycle no. 1 (address transition controlled) [21, 22] figure 5. read cycle no. 2 (oe controlled) [22, 23] figure 6. write cycle no. 1 (we controlled, oe high during write) [24, 25] previous data valid data valid rc t aa t oha t rc address data out 50% 50% data valid t rc t ace t doe t lzoe t lzce t pu high impedance t hzoe t hzce t pd impedance i cc i sb high address ce data out v cc supply current oe data valid t hd t sd t pwe t sa t ha t aw t sce t wc t hzoe address ce we data i/o oe note 26 notes 21. device is continuously selected. oe , ce = v il . 22. we is high for read cycles. 23. address valid before or similar to ce transition low. 24. data i/o is high impedance if oe = v ih . 25. if ce goes high simultaneously with we high, the output remains in high impedance state. 26. during this period, the i/os are in output state and input signals must not be applied.
cy62148e mobl ? document number: 38-05442 rev. *m page 9 of 18 figure 7. write cycle no. 2 (ce controlled) [27, 28] figure 8. write cycle no. 3 (we controlled, oe low) [28] switching waveforms (continued) t wc data valid t aw t sa t pwe t ha t hd t sd t sce address ce data i/o we data valid t hd t sd t lzwe t pwe t sa t ha t aw t sce t wc t hzwe address ce we data i/o note 29 notes 27. data i/o is high impedance if oe = v ih . 28. if ce goes high simultaneously with we high, the output remains in high impedance state. 29. during this period, the i/os are in output state and input signals must not be applied.
cy62148e mobl ? document number: 38-05442 rev. *m page 10 of 18 truth table ce we oe i/o mode power h [30] x x high z deselect/power-down standby (i sb ) l h l data out read active (i cc ) l l x data in write active (i cc ) l h h high z selected, outputs disabled active (i cc ) note 30. chip enable (ce ) must be high at cmos level to meet the i sb2 / i ccdr spec. other inputs can be left floating.
cy62148e mobl ? document number: 38-05442 rev. *m page 11 of 18 ordering information ta b l e 1 lists the cy62148e mobl ? key package features and ordering codes. the tabl e contains only the parts that are currently available. if you do not see what you are looking for, contact y our local sales representative. for more information, visit the cypress website at www.cypress.com and refer to the product summary page at http://www.cypress.com/products . ordering code definitions table 1. key features and ordering information speed (ns) ordering code package diagram package type operating range 45 cy62148ell-45zsxi 51-85095 32-pin tsop ii (pb-free) industrial CY62148ELL-45ZSXA 51-85095 32-pin ts op ii (pb-free) automotive-a 55 cy62148ell-55sxi 51-85081 32-pin soic (pb-free) industrial cy62148ell-55sxa 51-85081 32-pin soic (pb-free) automotive-a contact your local cypress sales repres entative for availability of these parts. temperature grade: x = i or a i = industrial; a = automotive-a pb-free package type: xx = zs or s zs = 32-pin tsop ii s = 32-pin soic speed grade: xx = 45 ns or 55 ns ll = low power process technology: e = 90 nm bus width: 8 = 8 density: 4 = 4-mbit family code: 621 = mobl sram family company id: cy = cypress cy xx xx 621 4 8 e x ll x -
cy62148e mobl ? document number: 38-05442 rev. *m page 12 of 18 package diagrams figure 9. 32-pin tsop ii (20.95 11.76 1.0 mm) zs32 package outline, 51-85095 51-85095 *b
cy62148e mobl ? document number: 38-05442 rev. *m page 13 of 18 figure 10. 32-pin soic (450 mil) s32.45/sz32.45 package outline, 51-85081 package diagrams (continued) 51-85081 *e
cy62148e mobl ? document number: 38-05442 rev. *m page 14 of 18 acronyms document conventions units of measure acronym description ce chip enable cmos complementary metal oxide semiconductor i/o input/output oe output enable mobl more battery life soic small outline integrated circuit sram static random access memory tsop thin small outline package we write enable symbol unit of measure c degree celsius mhz megahertz a microampere s microsecond ma milliampere ns nanosecond ? ohm % percent pf picofarad vvolt wwatt
cy62148e mobl ? document number: 38-05442 rev. *m page 15 of 18 document history page document title: cy62148e mobl ? , 4-mbit (512 k 8) static ram document number: 38-05442 revision ecn orig. of change submission date description of change ** 201580 aju 01/08/04 new data sheet. *a 249276 syt see ecn changed status from advance information to preliminary. updated features (added rtsop ii and removed fbga package). updated functional description (added rtsop ii and removed fbga package). updated pin configurations (added rtsop ii and removed fbga package). updated operating range (updated note 5 (changed v cc stabilization time from 100 ? s to 200 ? s)). updated data retention characteristics (changed maximum value of i ccdr parameter from 2.0 ? a to 2.5 ? a, changed minimum value of t r parameter from 100 ? s to t rc ns). updated switching characteristics (changed minimum value of t oha parameter from 6 ns to 10 ns for both 35 ns and 45 ns speed bin, changed maximum value of t doe parameter from 15 ns to 18 ns for 35 ns speed bin, changed maximum value of t hzoe , t hzwe parameters from 12 ns to 15 ns for 35 ns speed bin and 15 ns to 18 ns for 45 ns speed bin, changed minimum value of t sce parameter from 25 ns to 30 ns for 35 ns speed bin and 40 ns to 35 ns for 45 ns speed bin, changed maximum value of t hzce parameter from 12 ns to18 ns for 35 ns speed bin and 15 ns to 22 ns for 45 ns speed bin, changed minimum value of t sd parameter from 15 ns to 18 ns for 35 ns speed bin and 20 ns to 22 ns for 45 ns speed bin). updated ordering information (corrected typo in pa ckage name column, also updated ordering codes (to include pb-free packages)). *b 414820 zsd see ecn changed status from preliminary to final changed the address of cypress semiconductor corporation on page #1 from ?3901 north first street? to ?198 champion court? updated features (removed 35 ns speed bin). updated pin configurations (removed the note ?dnu pins have to be left floating or tied to v ss to ensure proper application.? and its reference). updated product portfolio (removed 35 ns speed bin). updated maximum ratings (updated note 3 to include current limit). updated electrical characteristics (removed ?l? version of cy62148e, changed typical value of i cc parameter from 1.5 ma to 2 ma at f = 1 mhz, changed maximum value of i cc parameter from 2 ma to 2.5 ma at f = 1 mhz, changed typical value of i cc parameter from 12 ma to 15 ma at f = f max , removed i sb1 parameter and its details, changed typical value of i sb2 parameter from 0.7 ? a to 1 ? a and maximum value of i sb2 parameter from 2.5 ? a to 7 ? a). updated ac test loads and waveforms (changed the ac test load capacitance from 100 pf to 30 pf in figure 2 , changed test load parameters r 1 , r 2 , r th and v th from 1838 ? , 994 ? , 645 ?? and 1.75 v to 1800 ? , 990 ? , 639 ?? and 1.77 v). updated data retention characteristics (changed maximum value of i ccdr parameter from 2.5 ? a to 7 ? a, added typical value for i ccdr parameter). updated switching characteristics (removed 35 ns speed bin, changed minimum value of t lzoe parameter from 3 ns to 5 ns, changed minimum value of t lzce and t lzwe parameters from 6 ns to 10 ns, changed maximum value of t hzce parameter from 22 ns to 18 ns, changed minimum value of t pwe parameter from 30 ns to 35 ns, changed minimum value of t sd parameter from 22 ns to 25 ns). updated ordering information (updated ordering codes and replaced package name column with package diagram).
cy62148e mobl ? document number: 38-05442 rev. *m page 16 of 18 *c 464503 nxr see ecn updated product portfolio (included automotive range). updated operating range (included automotive range). updated electrical characteristics (included automotive range). updated data retention characteristics (included automotive range). updated switching characteristics (included automotive range). updated ordering information (updated ordering codes (included automotive parts and their related information)). *d 485639 vkn see ecn updated operating range (updated v cc to 4.5 v to 5.5 v). *e 833080 vkn see ecn updated electrical characteristics (added v il parameter for so ic package, added note 9 and referred the same note in v il parameter for soic package). *f 890962 vkn see ecn updated pin configurations (added note 1 related to soic package). updated product portfolio (included automotive-a range and removed automotive-e range). updated operating range (included automotive-a range and removed automotive-e range). updated electrical characteristics (included automotive -a range and removed automotive-e range, added note 10 related to i sb2 and referred the same note in i sb2 parameter). updated data retention characteristics (included automotive-a range and removed automotive-e range). updated switching characteristics (included automotive-a range and removed automotive-e range). updated ordering information (updated ordering codes (added automotive-a part and its related information, removed automotive-e part and its related information). *g 2947039 vkn 06/10/2010 updated truth table (added note 30 and referred the same note in ce column). updated ordering information (added ?CY62148ELL-45ZSXA? part number). updated package diagrams . added sales, solutions, and legal information . *h 3006318 aju 08/23/10 updated data retention characteristics (added note 13 and referred the same note in i ccdr parameter). added ordering code definitions . added acronyms and units of measure . updated in new template. *i 3235744 rame 04/20/2011 updated functional description (removed the line ?for best practice recommendations, refer to the cypre ss application note an1064, sram system guidelines?). updated package diagrams . *j 3302815 rame 07/14/2011 updated in new template. *k 3539544 tava 03/01/2012 updated electrical characteristics (updated note 9 ). updated package diagrams . *l 3992135 memj 05/06/2013 updated functional description . updated electrical characteristics (added one more test condition ?v cc = 5.5 v, i oh = ?0.1 ma? for v oh parameter and its corresponding values). updated package diagrams : spec 51-85081 ? changed revision from *d to *e. completing sunset review. document history page (continued) document title: cy62148e mobl ? , 4-mbit (512 k 8) static ram document number: 38-05442 revision ecn orig. of change submission date description of change
cy62148e mobl ? document number: 38-05442 rev. *m page 17 of 18 *m 4099045 vini 08/19/2013 updated switching characteristics : added note 15 and referred the same note in ?parameter? column. updated in new template. document history page (continued) document title: cy62148e mobl ? , 4-mbit (512 k 8) static ram document number: 38-05442 revision ecn orig. of change submission date description of change
document number: 38-05442 rev. *m revised august 19, 2013 page 18 of 18 more battery life is a trademark and mobl is a registered trademark of cypress semiconductor corporation. all products and comp any names mentioned in this document may be the trademarks of their respective holders. cy62148e mobl ? ? cypress semiconductor corporation, 2004-2013. the information contained herein is subject to change without notice. cypress s emiconductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress product. nor does it convey or imply any license under patent or other rights. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement wi th cypress. furthermore, cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. any source code (software and/or firmware) is owned by cypress semiconductor corporation (cypress) and is protected by and subj ect to worldwide patent protection (united states and foreign), united states copyright laws and internatio nal treaty provisions. cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the cypress source code and derivative works for the sole purpose of creating custom software and or firmware in su pport of licensee product to be used only in conjunction with a cypress integrated circuit as specified in the applicable agreement. any reproduction, modification, translation, compilation, or repre sentation of this source code except as specified above is prohibited without the express written permission of cypress. disclaimer: cypress makes no warranty of any kind, express or implied, with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. cypress reserves the right to make changes without further notice to t he materials described herein. cypress does not assume any liability arising out of the application or use of any product or circuit described herein. cypress does not authori ze its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress? prod uct in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. use may be limited by and subject to the applicable cypress software license agreement. sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representatives, and distributors. to find t he office closest to you, visit us at cypress locations . products automotive cypress.co m/go/automotive clocks & buffers cypress.com/go/clocks interface cypress. com/go/interface lighting & power control cypress.com/go/powerpsoc cypress.com/go/plc memory cypress.com/go/memory psoc cypress.com/go/psoc touch sensing cyp ress.com/go/touch usb controllers cypress.com/go/usb wireless/rf cypress.com/go/wireless psoc ? solutions psoc.cypress.com/solutions psoc 1 | psoc 3 | psoc 4 | psoc 5lp cypress developer community community | forums | blogs | video | training technical support cypress.com/go/support

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